2011-02-10 22:00:05
SuperVidel production is closing in!

It is now time for you to re-register your interest in buying the SuperVidel. This is because we started the poll 1.5 years ago and since then the CTPCI has been released and generally people may have lost interest. So we need to get a fresh picture of how many boards to actually produce, since that will affect the price of each unit. So please go to the SV interest poll at our main page, click the update link and carefully follow the instructions.

You HAVE to update your registration to be counted, if you originally registered or updated before Feb 1st 2011. Of course we also welcome new registrations now. If you have any questions, email us!

2011-02-05 17:32:00
Time for a news update!

Our server has been down for a while because of broken hardware, but now we've moved its harddrives into a new computer, so it should work from now on.

We tested two TX slots and two RX slots with the Svethlana board, but didn't see that it was any faster than what we currently get from the EtherNat (Henrik got 1.3MB/s to/from an FTP server in the same network). In the future we can either assign more block-RAM in the FPGA to be Svethlana buffers, or implement an interface to the DDR2-RAM so we can have up to 128 buffers (max allowed by the MAC controller IP core that we use). Hopefully this speeds up things, or we need to look for the problem higher in the SW hierarchy (Mintnet).

Focus now is on preparing the SV for production, as we have now decided to not add more functionality to the FPGA than we currently have.

Last weekend we were on a nice winter NAS edition outside Falköping here in Sweden, were we met the usual Atari guys. We had many deeper discussions with Peter Persson about both MPEG-2 and 3D-support. He is currently working on patching NVDI5 so we can have a native SV driver in 16 and 32-bit, which uses all the functionality of the SuperBlitter. :)

2011-01-03 22:03:56
The VHDL issue that we had with the Svethlana was quickly fixed, and since then we have also managed to rewrite the Ethernat Mintnet driver to suit the Svethlana. It seems to work fine, as we can now surf the web and transfer large files to/from our server without errors. Just need to change the driver a bit so we use both TX packet slots that we have allocated block-RAM for in the FPGA, to (hopefully) get better speed. Right now we only use one packet slot.

2010-12-24 11:50:36
Merry Christmas! :)

Just a quick report on the last Svethlana progress:
We have come as far as testing the floodping program that we mentioned below. The pinging itself seems to go faster than with the EtherNat, but we have got the same problem with the MFP interrupt collisions that we had with the EtherNat. Our current solution in the VHDL code doesn't seem to be a very good one, so we have to try something else. But it shouldn't be a very big issue.

2010-12-20 00:00:33
The JED-file for the EtherNat that we mentioned a few days ago is now available for download. Instructions on how to update your EtherNat(s) is in the zip file too. :)

2010-12-18 18:41:15
We have now got both sending and receiving packets working on the svethlana board, with interrupts too. The next step is too write a simple ping program and test the stability, while a floodping is running on an ethernat. Then we can adapt the ethernat driver to the svethlana hardware (with the mac controller in the fpga). That should'nt take long since the integrated mac controller in the fpga is much easier to use than the 91c111 chip on the ethernat. After that the svethlana work is complete and we can focus on preparing the supervidel board for production.