2010-12-18 18:41:15
We have now got both sending and receiving packets working on the svethlana board, with interrupts too. The next step is too write a simple ping program and test the stability, while a floodping is running on an ethernat. Then we can adapt the ethernat driver to the svethlana hardware (with the mac controller in the fpga). That should'nt take long since the integrated mac controller in the fpga is much easier to use than the 91c111 chip on the ethernat. After that the svethlana work is complete and we can focus on preparing the supervidel board for production.

2010-12-14 13:59:45
We have decided a simple interrupt daisy chaining protocol with Rodolphe to be used when two or more boards are on top of each other on the CT60. With this in mind we have made a final JED-file to use when updating your Ethernat. The file will be put in the Download section soon.

Instructions:

You need a Xilinx USB cable or equivalent parallel cable to connect between your ethernat and a PC. A cheap alternative, which we have NOT tried ourselves, is this: http://www.renaelectronics.com/product_x_cable.htm

You need to install Xilinx Webpack (free) on your PC. Any version is ok.

Make sure the power is OFF on your falcon, and the Ethernat is in its usual place on the CT60. Set the CT60 to 030-mode. Earth yourself by using a wristband, or touch something grounded. Don't wear syntetic clothes.

Connect the GND wire on your cable to the GND pin in the Ethernat's JTAG header. The header is in the top left corner of the Ethernat board, 7 pins long. GND is the 2nd pin from the left. See the printed pin names on the board. Then connect all other pins, except the 3.3V (VREF or VCC on the cable) which is connected last. Power on the falcon.

How to use iMPACT (from my memory): Start the accessory iMPACT, press cancel if a dialog shows up, select Boundary Scan on the left. Right click in the big space and select "Initialize chain". The program will then search for the cable and what it is connected to. A symbol resembling a chip should show up. Right-click on it and select "Assign configuration file". A file selector appears. Select your JED-file and press OK to exit file selector. If a dialog appears, exit it using cancel. Right-click on the chip-symbol again and select "Program". A progress bar appears while programming is in progress. "Success" should appear in blue when it is done.

Turn off the falcon. Disconnect the cable from the Ethernat CAREFULLY by holding one finger on the green PCB of the Ethernat while two other fingers remove each cable wire. NEVER press on a chip! Disconnect the GND-pin last. Switch back to 060-mode. Turn on the falcon. Enjoy! :)

2010-12-08 22:04:16
Last weekend we found and fixed a serious bug in the VHDL code for the EtherNat CPLD! This fixes problems where the falcon could freeze during heavy network traffic. The bug was trigged when the MFP chip on the motherboard sent a level 6 interrupt to the 060, if a LAN interrupt arrived during a very small window when the MFP was already answering the interrupt acknowledge bus cycle. This would screw up the interrupt vector supplied to the 060 and hang the bus.

The EtherNats we currently are repairing will get reprogrammed with this fix, but we have to clear some things with Rodolphe first regarding the CTPCI +EtherNat problems before we send the boards back.

2010-11-29 20:26:30
Work has begun again on the Ethernet MAC parts of the SuperVidel for the Svethlana board. It is not quite finished for simulation of the VHDL code, but not very much work remains. We have also taken a new look at the Ethernat driver code (the one modified by Alan H in the Freemint CVS) and the CPLD VHDL code itself, while repairing some Ethernats. We have found at least two (old) bugs in the driver which we have fixed. The source code will be checked in to the Freemint CVS when we're done.

2010-09-21 12:59:47
Just to let you know that we're still alive I'd like to say that I (Torbjörn) am currently busy moving into a new appartment in Gothenburg. This takes a lot of energy so not much has happened on the SV since I looked at the Vsync problem mentioned below. But when I get settled in I will start developing the needed ethernet MAC controller for the SVEthLANa board. The Vsync problem has not found a solution yet, but some more measurements might solve it. Or not. :P

2010-08-24 18:53:36
Today I (Henrik) finished soldering the SVEthLANa prototype and now we got the first life signs from it. The SVEthLANa performs autonegotiation automatically from poweron and the LEDs of the ethernet connector are now nicely lit to show a successful autoneg to 100Mbit. :) What remains now is instantiating

Meanwhile Torbjörn is trying to fix a problem with synchronizing the VBL from the old Videl with the VBL of the SuperVidel when running in compatibility mode.